Current jobs related to Senior Verification Engineer - San Jose California - Advanced Micro Devices, Inc

  • Senior Verification Engineer

    4 weeks ago

    San Jose, California, United States Advanced Micro Devices , Inc. Full time

    Unlock Your Potential as a Senior Verification Engineer at AMDWe are seeking a highly skilled and motivated Senior Verification Engineer to join our team at Advanced Micro Devices, Inc. (AMD). As a key member of our SOC Verification Team, you will have the opportunity to work on cutting-edge verification environments using UVM verification methodology and...

  • Senior ASIC Verification Engineer

    1 month ago

    San Jose, California, United States Fidus Systems Full time

    Job Title: Senior ASIC Verification EngineerFidus Systems is a leading provider of embedded software design, system, and hardware solutions. We are seeking a highly skilled Senior ASIC Verification Engineer to join our team in San Jose, United States.This is an exciting opportunity to work on challenging projects for top-tier clients in the tech industry. As...

  • Senior ASIC Verification Engineer

    2 weeks ago

    San Jose, California, United States European Tech Recruit Full time

    Senior ASIC Verification Engineer - AI and Data CenterWe are partnering with a leading Semiconductor organization to accelerate AI computing in data centers and HPC. As a Senior ASIC Verification Engineer, you will play a critical role in ensuring the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators...

  • Senior Design Verification Engineer

    2 weeks ago

    San Jose, California, United States Mastech Digital Full time

    Job Title: Senior Design Verification EngineerLocation: HybridContract RoleRequirements:Advanced degree (BS/MS/PhD) or equivalent experience12+ years of experience in verification with expertise in testbench setup and automationProficient in verification at all levels, including block and subsystem levelsStrong knowledge of verification flows and coverage...

  • Senior Design Verification Engineer

    2 weeks ago

    San Jose, California, United States Mirafra Technologies Full time

    **Job Title:** Senior Design Verification Engineer**Job Summary:** We are seeking a highly skilled Senior Design Verification Engineer to join our team at Mirafra Technologies. The successful candidate will be responsible for verifying a next-generation AI engine as a member of a cross-geographic pre-silicon verification team.**Key Responsibilities:**Develop...

  • Senior ASIC Verification Engineer

    1 week ago

    San Jose, California, United States USA Tech Recruit Full time

    Job Title: Senior ASIC Verification EngineerJob Summary: We are seeking a highly skilled Senior ASIC Verification Engineer to join our team at USA Tech Recruit. As a Senior ASIC Verification Engineer, you will be responsible for ensuring the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and...

  • Senior Verification Engineer

    1 week ago

    San Jose, California, United States Broadcom Corporation Full time

    Job SummaryWe are seeking a highly skilled Senior Verification Engineer to join our team at Broadcom Corporation. As a key member of our verification team, you will be responsible for developing complex verification environments, test plans, functional coverage, and pseudo-random testing.Key ResponsibilitiesDevelop and implement verification strategies to...

  • Senior Design Verification Engineer

    1 month ago

    San Jose, California, United States Mirafra Technologies Full time

    Job Title: Senior Design Verification EngineerJob Summary:We are seeking a highly skilled Senior Design Verification Engineer to join our cross-geographic pre-silicon verification team. The successful candidate will be responsible for verifying a next-generation AI engine, working closely with the design and architecture team to ensure micro-architecture and...

  • Senior Systems Verification Engineer

    2 weeks ago

    San Jose, California, United States MILLENNIUMSOFT Full time

    Job Title: Senior Systems Verification EngineerBD Biosciences is seeking a skilled Senior Systems Verification Engineer to join our cross-disciplinary product development team. The ideal candidate will have a strong background in systems verification and validation principles, with experience in product development and design control.The Senior Systems...

  • Senior Design Verification Engineer

    1 week ago

    San Jose, California, United States Futran Tech Solutions Pvt. Ltd. Full time

    Job Description:Futran Tech Solutions Pvt. Ltd. is seeking a highly skilled Senior Design Verification Engineer to lead our verification engineering team. The ideal candidate will have experience in design verification, particularly in the areas of SV UVM, constrained and random verification, and low power verification.Key Responsibilities:Lead the...

  • Senior ASIC Verification Engineer

    1 month ago

    San Jose, California, United States USA Tech Recruit Full time

    Job Title: Senior ASIC Verification EngineerWe are seeking a highly skilled Senior ASIC Verification Engineer to join our team at USA Tech Recruit. As a key member of our engineering team, you will be responsible for ensuring the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP...

  • Senior Design Verification Engineer

    2 days ago

    san jose, United States Mirafra Technologies Full time

    Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

  • Senior Design Verification Engineer

    2 days ago

    San Jose, United States Mirafra Technologies Full time

    Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

  • Senior Design Verification Engineer

    1 day ago

    san jose, United States Mirafra Technologies Full time

    Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

  • Senior ASIC Verification Engineer

    3 weeks ago

    San Jose, California, United States USA Tech Recruitment Full time

    Senior ASIC Verification EngineerWe are seeking a highly skilled Senior ASIC Verification Engineer to join our team at USA Tech Recruitment. As a key member of our engineering team, you will be responsible for ensuring the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP...

  • Senior ASIC Verification Engineer Lead

    2 weeks ago

    San Jose, California, United States CISCO Systems Full time

    Job Title: Senior ASIC Verification Engineer LeadAbout the Role:Cisco Systems is seeking a highly skilled Senior ASIC Verification Engineer Lead to join our team. As a key member of our ASIC design verification team, you will be responsible for leading the verification effort for our next-generation ASIC designs.Key Responsibilities:- Lead the verification...

  • Senior ASIC Verification Engineer

    2 weeks ago

    San Jose, California, United States USA Tech Recruit Full time

    Job Title: Senior ASIC Verification EngineerAre you a seasoned ASIC Verification Engineer looking for a new challenge in a highly funded and expanding startup? We are seeking a senior-level ASIC verification engineer to join our team and contribute to cutting-edge projects in autonomous driving and AI.Key Responsibilities:Ensure the pre-silicon correctness...

  • Senior Design Verification Engineer

    2 weeks ago

    San Jose, California, United States Tripod Networking Full time

    At Tripod Networking, we are seeking a highly skilled Senior Design Verification Engineer to join our team.Key qualifications include:6+ years of experience in design verification with a strong focus on PCIEe.Expertise in Verilog/System Verilog programming and UVM.Bachelor's degree in Electrical or Computer Engineering.CXL experience is a plus.We offer a...

  • Senior Staff Verification Engineer

    2 weeks ago

    San Jose, California, United States Axiado Full time

    Senior Staff Verification EngineerAxiado is an AI-enhanced security processor company redefining the control and management of every digital system. We are seeking a highly skilled Senior Staff Verification Engineer to join our team of experts in Smart Edge SoCs for network/systems control, management security systems, and IIoT.Key ResponsibilitiesDevelop...

  • Senior Staff Verification Engineer

    3 weeks ago

    San Jose, California, United States Axiado Full time

    Senior Staff Verification EngineerAxiado is a leading company in Smart Edge SoCs for network/systems control, management security systems, and IIoT. We are seeking a highly skilled Senior Staff Verification Engineer to join our team.Key ResponsibilitiesProject Leadership: Develop test plans, lead verification teams, and ensure successful project...

Senior Verification Engineer

2 months ago

San Jose California, United States Advanced Micro Devices, Inc Full time
About the Role

We are seeking a highly skilled Senior UVM Design Verification Engineer to join our team at Advanced Micro Devices, Inc. As a key member of our Verification Engineering team, you will play a critical role in driving and improving our ability to deliver high-quality, industry-leading technologies to market.

Key Responsibilities
  • Develop and maintain tests for functional verification and performance verification at the IP level
  • Build testbench components, such as drivers, monitors, and checkers, to verify next-generation IP
  • Maintain or improve existing tests to support IP-level testing
  • Triage regression results and debug failures
  • Analyze coverage data to drive stimulus quality
Requirements
  • Proven industry experience in UVM
  • Strong skills in System Verilog and UVM-based testbench coding
  • Experience with functional verification of design IPs
  • Strong knowledge of computer architecture
  • Good ability to write scripts in Perl/Python to enable automation
  • Experience with protocols such as PCIe, CXL, and NVMe is an advantage
  • Good communication and strong problem-solving skills
Qualifications
  • Bachelor's or Master's degree in Computer Engineering or Electrical Engineering
  • Location: San Jose, CA