Formal Verification Engineer

10 hours ago


San Francisco, California, United States RISC-V Full time
Job Title: Formal Verification Engineer

We are seeking a highly skilled Formal Verification Engineer to join our team at RISC-V International. As a key member of our team, you will be responsible for developing and maintaining the RISC-V Formal Model codebase using the Sail programming language.

Job Description

RISC-V International is a non-profit organization that enables the development and adoption of the RISC-V Instruction Set Architecture (ISA). We are looking for a talented Formal Verification Engineer to help us develop and maintain the RISC-V Formal Model codebase.

Key Responsibilities
  • Develop Sail Formal Model code for RISC-V ISA extensions and upstream to the RISC-V Sail repository
  • Develop assembly language tests to demonstrate proper Sail implementation of the extension and/or feature as compared to the text of the specification
  • Enhance Sail infrastructure to support the RISC-V Formal Model
  • Collaborate with the RISC-V Sail ecosystem, including the RISC-V Sail maintainer, Cambridge Sail staff, and RISC-V Task Groups
  • Maintain the RISC-V Sail Formal Model community, including mailing lists, informational meetings, and developer training
Qualifications
  • 5+ years software or hardware development experience
  • BS/BA in Electrical or Computer Engineering or equivalent years of experience
  • Understanding of computer architecture, privilege levels, virtual memory, formal verification, and design verification
  • Experience with strongly typed programming languages, such as Rust, Haskell, OCaml, F#, Scala
  • Experience developing open source code
  • History of successful completion and maintenance of software projects

We offer a competitive salary range of $12,000 to $15,000 per month based on experience. If you are a motivated and experienced Formal Verification Engineer looking for a new challenge, please submit your application.



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