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Physical Design Engineer Lead

2 months ago

San Diego, California, United States InnoPhase IoT Full time
About InnoPhase IoT

We are a cutting-edge technology company that specializes in creating innovative solutions for the Internet of Things (IoT) industry. Our team is passionate about developing high-performance, low-power wireless IoT solutions that transform the way people live and work.

Job Summary

We are seeking an experienced Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for designing, developing, and executing physical design implementation of low-power and high-performance System-on-Chip (SoC) in advanced technology nodes.

Key Responsibilities
  • Collaborate with the RTL and System design teams to drive the physical design of the device in early design cycle
  • Design, implement, and verify suitable methodology that meets the Quality of Results (QoR) goals
  • Resolve design and flow issues related to the physical design, identify potential solutions, and drive execution
  • Deliver physical design of entire SoC, complete with specification, flow, and automation
  • Interface with the RTL design team to drive design modifications to resolve physical design issues and implement Engineering Change Orders (ECOs)
  • Utilize Electronic Design Automation (EDA) tool-based programming and scripting techniques to automate and improve throughput and quality
  • Interact with tool vendors to drive tool fixes and flow improvements. Perform tool evaluations of new vendor tools and functions
Requirements
  • Bachelor's degree (Master's preferred) in Electrical Engineering or comparable engineering discipline
  • 8+ years of proven experience in physical design
  • Experience with logic synthesis
  • Experience in physical design and timing closure for advanced nodes
  • Experience in Cadence EDA tools for physical design and verification
  • Experience in floor planning, power planning, Clock Tree Synthesis (CTS) specification, place & route, and timing closure
  • Experience in Common Power Format (CPF)/Unified Power Format (UPF) specs design and implementation
  • Ability to work with cross-functional teams, IP, and EDA vendors