Digital IC Design Engineer

4 weeks ago

Dallas, Texas, United States Texas Instruments Full time
About the Job

The Embedded Processors team at Texas Instruments is seeking a highly skilled Digital IC Design Engineer to join our team. As a member of this team, you will be responsible for designing, architecting, and micro-architecting IPs meeting data movement, interconnect, safety, security, real-time functionality, multimedia, ARM CPU cores, and vision analytics needs.

You will work closely with various engineering teams within the Processor organization, including SoC design, verification, validation, test, systems, SW, applications, and marketing to successfully develop new IPs from concept to design.

The ideal candidate will have expertise in data movement and bus protocols (AMBA, OCP, etc.) and knowledge of interrupt, security, safety, coherence, ARM CPU cores, and/or multimedia IPs (imaging, display, and vision).

Responsibilities
  • Be a key team member from IP requirement definition to release to market, working closely with all cross-functional teams.
  • Define or enhance the micro-architecture for digital IP blocks.
  • RTL development and QC flows (Lint, CDC, synthesis) to ensure superior IP quality.
  • Interface with 3rd-party IP vendors and drive requirements and delivery milestones/quality.
  • Work closely with IP verification team to help build the IP verification plan and tests. Support functional debugs.
  • Support IP during silicon bring-up activities, test program development, customer engagement, and silicon/application debug.
  • Drive IP architectural optimization for area, power, and performance improvements.
Qualifications
  • Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related field of study.
  • 10 years of experience in design/RTL development.
  • Expertise in data movement, SOC integration concepts, bus-protocols (AMBA, i.e., AXI, CHI, AHB, APB, etc.), exposure to ARM CPU cores, and multimedia processing (imaging, video, vision, and display).
  • Must know Verilog language.
  • Simulation tools like NCsim, code coverage, and debug tools.
  • Lint checkers, Clock domain crossing (CDC) checkers, Synthesis, and timing-closure.
  • A good understanding of digital functionality and exposure to digital design methods.
  • Hands-on front-end design experience of complex multi-clock domain IP blocks.
  • Ability to convert high-level system requirements/changes into micro-architectural changes and then into RTL.
  • Ability to extract the functionality/micro-architecture of existing design even with sparse legacy documentation.
  • Familiarity with verification environments to be able to actively participate in functional debugs.
  • Understand and own in detail the functional specifications of the IPs.
  • Participate in and conduct design reviews. Create the necessary design documentation.
  • Ability to take initiatives and drive the results working with team members across time-zones.
  • Handling & owning design deliverables and schedule.
  • Ability to solve problems using a systematic approach.
  • Experience with SystemVerilog and VHDL.
  • Knowledge of bus protocols such as AXI, CHI, AHB, APB, OCP, etc., ARM CPU cores, Multimedia IPs (imaging, vision, video, display).
  • Experience with bus protocol such as AXI, AHB, APB, OCP, etc.
  • Experience with scripting languages such as TcL, Perl, and Python.
  • Silicon debug experience on the automated test equipment (ATE) and bench characterization environments.
  • Demonstrate strong analytical and problem-solving skills.
  • Strong verbal and written communication skills.
  • Ability to work in teams and collaborate effectively with people in different functions.
  • Strong time management skills that enable on-time project delivery.
  • Ability to work effectively in a fast-paced and rapidly changing environment.
  • Ability to take the initiative and drive for results.
  • Verification and validation experience are a plus.

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