Senior Digital Verification Engineer

8 hours ago

Dexter, Maine, United States Monolithic Power Systems Full time
Job Summary

A Senior Digital Verification Engineer will define and lead the development of the Digital Verification framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. The ideal candidate will have expertise in UVM and System Verilog based Digital Verification environment definition and development, as well as experience with industry standard ASIC tools/flow for daily work.

Key Responsibilities
  • Define and lead the development of the Digital Verification framework and infrastructure
  • Develop and standardize VIPs (Virtual Interface Protocols) for complex digital and mixed-signal ICs
  • Integrate VIPs into the Project's Digital Verification environment
  • Develop and manage Digital Verification Metrics for RTL and Gate-Level
  • Plan and develop Digital Verification Automation and Scripting
  • Lead and supervise Digital Verification Tasks of multiple projects
  • Review Digital Verification Metrics and Results of multiple projects
  • Define and design Digital Verification Top-Level Tests
  • Analyze and debug test results, code coverage and functional coverage
  • Develop and manage Digital Verification estimation, planning and scheduling to meet tape-out
Requirements
  • PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework
  • 5+ years of strong experience in both RTL and Gate-Level in Digital Verification Industry Languages (UVM, System Verilog) and Standards
  • Proficient Level in DV skills and areas: Constraint random tests, SV assertions, coverage metrics, analog and digital DV modelling, DV test plans, regression analysis and reports, UVM DV Agents (Monitor, Driver, Scoreboard), etc.
  • Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.
  • Excellent Knowledge & Use of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc.
  • Excellent scripting and automation skills using TCL, Python or C/C++
  • Leadership skills to technically guide the DV Team and mentor Jr. DV Designers
  • Good written/verbal communication skills and strong team work
Preferred Qualifications
  • Experience with the following is a plus: Embedded designs and/or firmware development
  • Knowledge of power management industry/applications
  • I2C, I3C, SPI, USB, PMBUS
  • GitLab

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