ASIC Design for Testability Specialist
3 weeks ago
We are seeking an experienced ASIC Design for Testability Engineer to join our team in Linthicum, Maryland.
About the Role:The successful candidate will be responsible for designing and implementing testability features for ASICs, working closely with the Digital Technologies department to ensure high-quality product designs.
Key Responsibilities:- Design and implement DFT (Design for Testability) aspects of ASIC Design
- Develop and maintain VHDL, Verilog, or SystemVerilog RTL code
- Collaborate with test engineers to implement ATPG vectors on tester hardware
- Generate test patterns and analyze and debug test failures
- Work with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE and IEEE AC JTAG
- Experience with memory BIST and logic BIST
- Bachelor's degree in Electrical Engineering or a related discipline
- Minimum of 9+ years of relevant experience
- Experience in the full product life cycle of ASIC Design
- Experience with Cadence, Mentor and/or Synopsys test insertion and ATPG tools
- Proficiency in HDL (VHDL/Verilog/SystemVerilog) and scripting languages such as Tcl, Python or Perl
Our client is a world leader and premier innovator in aerospace, with over 100,000 top talent employees providing the most advanced products and technologies in the industry.
We are an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law.
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