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Senior Principal Technical Architect

2 months ago

Santa Clara, California, United States Advanced Micro Devices , Inc. Full time

Overview:

YOUR IMPACT AT AMD IS SIGNIFICANT

At AMD, we are committed to revolutionizing lives through our innovative technology, enhancing our industry, communities, and the globe. Our goal is to create exceptional products that propel next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, personal computing, gaming, and embedded systems. Central to our mission is the AMD culture, where we challenge the boundaries of innovation to tackle the world's most pressing issues. We pursue excellence in execution while fostering a direct, humble, collaborative, and inclusive environment that values diverse perspectives.

Together at AMD, we progress.

Key Responsibilities:

THE POSITION:

The selected candidate will join the AMD memory interfaces design team, tasked with defining, specifying, architecting, executing, and productizing cutting-edge memory PHYs for future system-on-chips (SOCs).

  • Provide technical leadership and establish technical direction for the entire memory PHY RTL team.
  • Collaborate with clients and stakeholders to comprehend feature requirements and convert them into actionable specifications.
  • Define RTL architecture, microarchitecture, and design implementation for memory PHYs.
  • Document RTL architecture and micro-architecture comprehensively.
  • Engage in RTL coding, conduct code reviews, and perform debugging.
  • Set and uphold quality standards for RTL development.
  • Participate in Post-Silicon activities such as Bring-Up, Platform Validation, Characterization, Parameter Optimization, and final Productization.
  • Support the formulation of development workflows that enhance efficiency and quality of execution.
  • Work closely with Physical Design, Firmware, and Design Verification teams to ensure successful end-to-end RTL implementation.

Qualifications:

  • Demonstrated success in tape-outs and IP productization, preferably in high-speed IPs (Memory or Serdes).
  • Ability to transform product feature descriptions into implementable architectures/designs, including clear documentation for implementation and verification.
  • Experience in guiding teams at a technical level and collaborating with external groups to understand requirements and devise feasible solutions to inter-IP challenges.
  • Comprehensive understanding of design challenges across multiple clock/reset/power domains and safe/robust design practices.
  • Proficiency in refactoring/restructuring designs to address timing/area challenges, including algorithmic and structural design modifications.
  • Knowledge and experience in optimizing hardware versus firmware implementations for overall product performance and efficiency.
  • Extensive knowledge of industry-standard tools and best practices for high-quality RTL design (both front-end and back-end) and Design Verification.

Academic Credentials:

Master's degree in Electrical Engineering or related field, or PhD.

AMD is an equal opportunity employer, committed to inclusivity and diversity. We welcome applications from all qualified candidates and will accommodate applicants' needs throughout the recruitment and selection process.