VLSI Engineer

Position Overview:

IMPACT THROUGH INNOVATION

At Advanced Micro Devices, Inc. (AMD), we are dedicated to revolutionizing the technology landscape, enhancing lives through our cutting-edge products. Our mission focuses on creating exceptional solutions that propel the future of computing, encompassing data centers, artificial intelligence, personal computing, gaming, and embedded systems. Our culture fosters innovation, encouraging collaboration and inclusivity to tackle the most pressing challenges in our industry.

Role Summary:

The Cores Organization at AMD is at the forefront of delivering high-performance CPUs, caches, and chiplets that form the backbone of our business. We are seeking a skilled VLSI RTL Design Engineer to join our dynamic team. This role involves pioneering and executing top-tier cache and fabric designs that set industry standards. The successful candidate will play a pivotal role in the development of AMD's next-generation cores and caches.

Candidate Profile:

The ideal candidate possesses substantial experience in Cache Controller Design, demonstrating a track record of achieving ambitious objectives within tight timelines. As a microarchitecture and RTL engineer, the candidate should thrive in collaborative environments, engaging with diverse teams across various technical domains. Our team is committed to pushing performance boundaries, necessitating a mindset that challenges conventional approaches. Creativity, innovation, and exceptional communication skills are essential. Strong analytical and problem-solving abilities are crucial for overcoming complex challenges. The candidate will also be expected to mentor junior engineers as our team expands.

Key Responsibilities:

• Lead the development and execution of Cache Architecture utilizing RTL Design, Verilog HDL, and scripting.
• Collaborate with Cache and CPU Architects to design, document, and implement optimized high-performance Cache and Routing Fabric designs.
• Work closely with Physical Design teams to create RTL that meets physical construction and timing requirements.
• Partner with Design Verification teams to ensure clear documentation and verifiability of architecture and features.
• Engage with Design For Test teams to produce RTL that is reliable, testable, and manufacturable.
• Coordinate with global teams to address complex architectural interactions between IP and SoC designs.
• Innovate to enhance CPU design quality, simplify complexities, and improve technical collaboration.
• Address design and tool challenges with innovative solutions and present findings to peers and management.
• Provide guidance and mentorship to junior engineers.

Preferred Qualifications:

• Demonstrated experience in Cache architecture development and execution.
• Effective collaboration with diverse teams across multiple disciplines.
• Proficiency in Digital RTL Design, Verilog HDL, and scripting.

Educational Background:

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, Computer Engineering, or a related field.

Location: This position is based in a collaborative environment.

AMD is an equal opportunity employer, committed to fostering an inclusive workplace. We welcome applications from all qualified candidates and will accommodate applicants' needs throughout the recruitment process.