SOC Verification Engineer
2 weeks ago
Job Title: SOC/UVM Verification Engineer
Job Type: Contract
Duration: 6 Month Initial with chance to renew
Location: France
We are seeking a skilled SOC/UVM Verification Engineer to join our client's Connected Security team in France.
Responsibilities:
* Assist in the development and implementation of UVM verification environments
* Collaborate with the team to design and test complex SOC systems
* Implement automated frameworks for verification and testing
* Utilize SystemVerilog and C programming languages
* Work with IP, Subsystem, and SOC systems
* Develop and maintain knowledge of microcontroller architecture
Requirements:
* Extensive knowledge of UVM verification
* Experience with SystemVerilog and C programming languages
* Strong understanding of automated framework implementation
* Proven track record in ASIC verification
* Familiarity with IP, Subsystem, and SOC systems
* Knowledge of microcontroller architecture
Note: Due to the urgency of the position, our client cannot accept applications from candidates who require sponsorship to work in France. Applicants must be in possession of an EU passport or a non-sponsored work visa/permanent residency for France.
Unless stated otherwise, please assume that the rates required would be for a consultant to be based on-site full time in France with no option of remote working.
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