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Design Verification Engineer

2 months ago

Reston, Virginia, United States Socionext US Full time
About the Role

Socionext US is seeking a highly skilled Design Verification Engineer to join our team. As a key member of our design verification team, you will be responsible for ensuring the quality and reliability of our ASIC designs.

Key Responsibilities
  • Develop and implement verification methodologies and standards to ensure uniformity and best practices across the team.
  • Collaborate with design teams to identify and resolve design verification issues, ensuring timely and accurate delivery of projects.
  • Design and implement test benches in UVM and System Verilog, run regressions at RTL and gate level, and generate and report DV metrics.
  • Debug failures and provide feedback to the design team to ensure high-quality designs.
  • Work closely with Socionext's design team to ensure the company meets design requirements for projects, including review of specifications, understanding chip architecture, and developing tests and coverage plans.
  • Provide excellent customer service to clients and projects, supporting and driving timely and accurate deliverables within schedules.
Requirements
  • BS or MS in Computer Science or Electrical Engineering.
  • 5-10+ years of industry experience bringing silicon ICs into high-volume production.
  • Strong experience with UVM and full-chip verification.
  • Leadership experience in a single project.
  • Knowledge of industry-standard interfaces and extensive familiarity with Verilog, simulation tools, and debugging in real-time.
  • Sound knowledge of ARMv8, interconnect, memory coherence, and memory architectures.
  • Familiarity with formal verification tools and expertise in writing Perl/Python, awk, sed, and common scripts to automate verification tasks.
  • Advanced knowledge of ASIC design and verification flow, including RTL design, simulation, test bench development, regression, equivalence checking, timing analysis, scan insertion, and test pattern generation.
  • Experience with low-level programming of systems in C/C++ and scripting languages such as Perl, Python, and Tcl.
  • Functional understanding of constrained random verification, functional coverage, and code coverage.
  • Low power verification UPF.
  • Team player with excellent communication skills and a desire to take on diverse challenges.
Preferred Qualifications
  • Good knowledge of low power camera and imaging systems.
  • Experience with formal verification tools.
  • CPU Security, Secure boot, Secure JTAG.
  • Familiarity with ARM architecture.
  • Familiarity with scripting/programming with Perl/Python, Tcl, C/C++.