physical implementation engineer

3 weeks ago


Austin, United States Mindlance Full time
Key Responsibilities
  • Would be responsible for hands-on physical implementation core platforms and SoC's.
  • Evaluate and deploy the evolving physical design methodologies to handle increasingly complex SoC/IP designs within aggressive, market-driven schedules
  • Active participation in benchmarking of library, technology parameters, implementation strategy to enable design requirements of die size, power & speed.
  • Ensure quality adherence during all stages of the project life cycle. Drive thorough analysis of existing processes and recommend and implement the process improvements to ensure 'Zero Defect' chips
  • Enable technological innovations from day to day learning & project experiences
  • Actively work as part of team both locally & also with remote or multi-site teams

Key Skills
  • Self starter with 5-12 years of experience on SOC/Chip level/IP physical design on multimillion Gate and complex design with multiple clocks and power domains with minimal supervision.
  • Expertise in Physical implementation, floorplanning, partitioning, padring integration, Power Estimation, Power Grid design, Power/IR analysis, Reliability and physical verification checks using Synopsys/Cadence/Siemens tools
  • Sound knowledge of package type understanding, ESD integration, PI-SI analysis is desirable
  • Sound knowledge of timing closure flow with hands-on experience in synthesis, formal equivalence, placement, optimization, low power checks, clock tree, routing, crosstalk delay/noise analysis & repair using Cadence/Synopsys/Magma tools is desirable
  • Good control over scripting languages like PERL/TCL is MUST.
  • Knowledge of commonly used clocking, low power schemes, spice simulations, DFT techniques are added advantage.


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