PDK Customer Support Engineer for ASIC Auto Place and Route

1 week ago

Phoenix, United States Intel Full time

Job ID: JR0164592 Job Category: Engineering Primary Location: Phoenix, AZ US Other Locations: US, California, Santa Clara;US, Oregon, Hillsboro Job Type: Experienced Hire **PDK Customer Support Engineer for ASIC Auto Place and Route**

**Job Description**

This position is within the Design Enablement (DE) which is one of the key pillars enabling Intel to deliver winning products in the marketplace. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers.

The Process Development kit (PDK) Customer Support team within this organization is looking for Customer Obsessed individual in the area of ASIC Auto Place and Route (APR) support to provide a positive experience to our customers. The candidate would be expected to help resolve the customer issues they see while using the PDK collateral in APR tools. In addition, the candidate would prepare training material to inform and educate customers on PDK collateral usage.

Behavior traits:

* Proven track record of uncompromising customer orientation to deliver leading-edge solutions

* Debugging skills to root cause the customer issue and propose solutions

* Be fearless in bringing the voice of the customer to the PDK team and ability to lead and facilitate meetings with customers and PDK team to ensure timely resolution of customer issues

* Thrive in a fast paced, challenging environment

* Detail oriented

* Verbal communication, technical writing skills, and presentation skills.

**Qualifications**

Minimum Qualifications:

4+ years of relevant experience with Bachelor of Science in Electrical Engineering, Computer Engineering, or relevant scientific STEM major or MS with 3+ of relevant experience in the following areas:

* ASIC flow knowledge of using either of Synopsys Fusion Compiler or Cadence Innovus

* Static timing analysis, synthesis, APR and physical verification

* Intel and/or external foundry process technology knowledge in advance nodes

**Inside this Business Group**

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth

**Other Locations**

US, California, Santa Clara;US, Oregon, Hillsboro

**Posting Statement**

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

US Experienced Hire JR0164592 Phoenix

**Information Our Partners Collect**

**Your Choices**

Always Active These technologies are necessary for the Intel experience to function and cannot be switched off in our systems. The technology is usually only set in response to actions made by the device owner which amount to a request for services, such as setting privacy preferences, logging in, filling in forms, maintaining secure login areas, maintaining state across pages (remembering items in a shopping basket), and server load balancing. The device owner can set their preference to block or alert Intel about these technologies, but some parts of the Intel experience will not work. These technologies do not store any personally identifiable information.

**Analytics**

Analytics Active These technologies allow Intel to count device visits and traffic sources, so Intel can measure and improve the performance of our experiences. The technology helps Intel to know which experiences are the most and least popular and see how device owners interact with the experience. All information these technologies collect is aggregated and therefore anonymous. If the device owner does not allow these technologies, then Intel will not know when the device owner visited or how the device owner interacted with our experiences.

**Functional**

Functional Inactive These technologies enable the Intel experience to provide enhanced functionality and personalization. The technology may be set by Intel or by third-party providers whose services Intel have added to our experiences. If the device owner does not allow these technologies, then some or all of these services may not function properly for the device owner.

**Ad Targeting**

Ad Targeting Inactive These technologies may be set through our Intel experience or by our advertising partners. The technology may be used to build a profile of the device owners interests and show the device owner relevant advertisements on other experiences. The technology does not store directly personal information on the device, but the technology is based on uniquely identifying the device. If the device owner does not allow these technologies, then the device owner will experience less targeted advertising.

**Welcome**

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