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Design Verification Engineer

2 months ago

Mountain View, United States Compunnel Full time

Responsibilities: Plan the verification of complex design IP/SoC like CPU/Core/GFX block. Develop tests using UVM. Identify and write functional coverage for stimulus and corner cases. Analyze and debug test failures with designers to deliver functionally correct design. Assembly tests for any ISA is strongly desired but not required. Close coverage to plug verification holes and meet tape out requirements. IP integration DV. Stimulus generation tools development and automation. Qualifications: Experience in design verification with a proven track record of delivering complex CPU or GPU’s. CPU/GPU Functional Verification Experience is Required. Should be able to write the UVM Code and understand the design. In depth knowledge of verification principles, testbenches, stimulus generation and UVM based test environments . Solid understanding of computer architecture. Substantial background in debugging RTL (Verilog) designs. Good Knowledge of VCS Simulation and Scripting language such as Python.