Semiconductor Design

** Semiconductor Design & Verification Engineer**

Montreal, CA

Req ID: NCG254-21

**Company Description**

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

**Job Description**

Microchips Communications Business Unit (CBU) is seeking to employ an Engineering Level1- Semiconductor Design & Verification Engineer. CBU develops leading edge semiconductor and software solutions that are used by world-wide communications service providers to build their networks which connect 5G mobile, high speed residential broadband and business enterprise services to the Cloud to deliver the real-time connectivity, collaboration and content sharing services that bring us together.

The successful candidates who join our team will help drive continued innovation of our semiconductor and software solutions. The products you design will be deployed in communications networks that enable the real-time services you rely on every day; online educational, work collaboration, global connectivity with family and friends via social media, online streaming of video, pictures, movies or gaming and online purchases and services.

Junior candidates may be offered immediate employment while upcoming graduates may be offered employment following the Fall or Winter semester. Candidates of interest will have a background in hardware design, software development or hardware verification.

Job responsibilities may include

Work within an overall team dedicated to new product development but focus on a smaller team targeting the development of device subsystems. Subsystem teams carry out the specification, design, verification, implementation and integration of device subsystems. Each subsystem is comprised of blocks which individual members are responsible for.

Understanding functional specifications describing high-level functionality of design and/or testbench blocks to be coded. Level1 Engineers may receive detailed implementation descriptions to focus on block coding immediately.

Design activities include Hardware Descriptive Language (HDL) coding and verification of functional blocks as well as the synthesizing of HDL to gates. Detailed activities may include contributing to verification plans, reviewing of synthesis results, design reviews and static timing analysis of the implemented code.

Verification activities include the test planning, modeling, coding of testbench components and overall acceptance criteria of designs. Detailed activities may include contributing to design reviews, generation of test plans, functional modelling, simulation, debugging and functional coverage to ensuring designs satisfy specifications and requirements.

Development teams are involved during the complete development cycle from feasibility to production and will be given the opportunity to participate in validation testing, software development, emulation, customer support or production teams.

**Job Requirements**

Bachelors or Graduate Degree Computer Sciences, Electrical, Software or Computer Engineering. Digital hardware, computer architecture or embedded firmware academic concentrations are desired.

Experience with Hardware Descriptive Languages (HDL) such as System Verilog, Verilog or VHDL is required. Candidates are expected to know how HDL languages simulate and map to digital logic.

Understand digital hardware architectures and logic (state-machines, RAM, registers, buses and etc) is required.

ASIC or FPGA development experience with Synopsys, Cadence, Mentor, Xilinx or Intel (Altera) tool suites is an asset.

While working at the abstract software/verification layer, must be able to understand digital hardware architectures and logic (State-machines, RAMs, Registers, Buses and etc).

Knowledge of verification principles and methodologies such as UVM is an asset. Ability to work at a software or verification level of hardware abstraction is a requirement. Experience with software object-oriented programming is a requirement for more verification-oriented candidates.

Knowledge of embedded processors (ARM/RISC-V) and bus architectures (AMBA) is an asset

Experience with software development tools such as Jenkins or Code Collaborator is an asset

Experience with control revision tool such as Subversion or Git is required

Ability to work in a Linux shell environment and Linux scripting (CSH/TCL/Perl/Python) is required.

Must be self-driven & proactive with a desire to understand, learn more, do more & make a difference.

Excellent analytical and debugging skills with the ability to proactively solve issues is required.