Senior FPGA Design Engineer

Silvus Technologies

is dedicated to one mission: connecting those who keep us safe. We do so by delivering the most advanced Mobile Ad-hoc Network (MANET) radios powered by our custom and ever evolving Mobile-Networked MIMO waveform. Together, our radios and waveform provide vital communications for mission-critical applications in the harshest environments from underground tunnels to high-altitude balloons. Silvus

StreamCaster

radios are being rapidly adopted by customers all over the world ranging from the U.S. and Allied Nations Departments of Defense to International, Federal, State, and Local Law Enforcement agencies, all the way to the Superbowl, Grammys, and industry-leading drone, robot, and other unmanned systems manufacturers. Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of

“Keeping Our Heroes Connected”

? Silvus’ rapid growth is fueled by a focus on research and innovation and a team of the most passionate, skilled and creative thinking individuals.

If you are looking for a fulfilling experience, you owe it to yourself to learn how Silvus can be the next chapter of your career. THE OPPORTUNITY Silvus is seeking a full-time

Senior FPGA Design Engineer

to join our Engineering Group, reporting to both the

Senior Engineering Director

for Irvine and the

Director of FPGA Engineering (dotted-line) . The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects targeted to address challenging real-world communication needs. The

Senior FPGA Design Engineer

will be based at our new Silvus office, located in

Irvine, CA.

The position will be on a hybrid schedule, with a minimum of 4 days/week on-site (with the occasional drive to the Los Angeles HQ as needed). The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion. ROLE AND RESPONSIBILITIES Fixed point design of signal processing blocks while working with systems engineers. RTL coding, simulation, and test bench development. FPGA synthesis and timing closure. Hardware verification and troubleshooting; familiarity with logic analyzers. Provide support to the RF and Software Engineering Teams. REQUIRED QUALIFICATIONS Bachelor of Science degree in Electrical Engineering, Computer Science, or relevant fields. Minimum 8 years of demonstrated experience in FPGA design; 4 years of FPGA design experience with an MS or advanced degree. Demonstrated experience with fixed point binary arithmetic and digital signal processing designs. Proven expertise working with multiple clock-domain, high-utilization FPGA designs. Experience with Xilinx FPGAs, SoCs, and the Vivado IDE. PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES Master of Science degree in Electrical Engineering (MSEE). Basic MATLAB skill. Experience with communication systems on FPGA or ASIC designs. COMPENSATION The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate’s experience and qualifications. CA Pay Range $135,000

—

$200,000 USD NOTE - As a US Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does NOT apply to International positions; only job postings for positions located in the US. All Employment is contingent upon the successful clearance of a background check. Silvus is proud to be an equal-opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.

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* -- I acknowledge that I meet the minimum experience requirements for this role.

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* -- What is your experience level working with complete FPGA designs (as opposed to working on modules or portions of a full design)?

*

What is your experience level with implementing or using signal processing blocks such as filters or correlators?

* No experience (but willing to learn) Exposure Experience Expertise Subject Matter Expert

What is your experience level with fixed-point binary arithmetic?

*

What is your experience level working with Xilinx Ethernet IPs/other high-speed IPs, and/or complete FPGA designs that have included these blocks?

*

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