Emulation

3 weeks ago

Palo Alto, United States QuEST Global Full time

Emulation Engineer

Emulation based verification/validation :

Location - Palo Alto / Austin

Required Skills

  • Good Experience (5+ years) with Emulation based Verification using : Cadence Palladium, Synopsys Zebu or Mentor Veloce
  • Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python.
  • Proficient in debugging complex SOC or CPU core designs multithreading, scheduling.
  • Good understanding of livelock and deadlock scenarios multi-core complex designs
  • Experience in triaging regressions, debugging, and resolving down to RTL or Testbench issues.
  • Experience building UVM scoreboards for NOC based Switching, Routing networks .

Preferred Skills

  • Ability to create and connect C/C++ reference models via DPI for RTL-to-C checking.
  • Knowledgeable in RISCV/ARM assembly programming

Regards,

Sanghamitra Mohanty

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