SOC Infrastructure IP System Engineer

4 weeks ago

San Diego, United States Qualcomm Full time

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.

GENERAL SUMMARY

The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System Cache, Memory controllers and System MMU that are implemented in all Qualcomm SoCs. This position primarily involves defining controlled software interfaces for the next generation of SOC Infra HW IPs. The ideal candidate should demonstrate the ability to define new HW architectures and SW interfaces that are developer friendly. It requires deep understanding of the HW & SW architecture and the complete design flow. This is a challenging position, defining and driving our most innovative technologies.

Responsibilities
In your role, you will:

  • Define and drive our next generation of SOC Infrastructure IP from architecture to implementation into a real product.
  • Establish controlled software interfaces in close collaboration with the software team.
  • Be responsible for all technical aspects of the project, dealing with Product Engineers, SOC HW & SW architects, Program managers, Performance, Design, Implementation, Verification and Validation teams.
  • Ensure all PPA (Performance, Power, Area) targets are met

Skills/Experience

  • Strong knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture
  • Strong knowledge in HW-SW interfaces and firmware
  • Strong knowledge in Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces
  • Experience / knowledge with split multi-die / chiplet architectures
  • Experience with Performance modeling and validation
  • Experience with RTL design and complete design flow
  • Ability to quickly react and adapt to changes.
  • Excellent communication skills.

Preferred Qualifications

  • Strong knowledge in SOC infrastructure IP (NOC, Caches, SMMU, Memory Controller)
  • Strong knowledge in HW-SW interfaces, APIs & firmware
  • Experience with industry standards (PCIe, USB, UFS, MIPI, UCIe,)
  • Experience in Data Science, Machine Learning is a plus
  • Experience in Functional Safety is a plus

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