ASIC/RTL Design Engineer

Job Description: ASIC Design & RTL Skills Architecture exploration and improvements Micro-architecture development includes interface definition, state machine, data & control path definition, design partitioning. RTL development using Verilog, System Verilog Lint, CDC, Synthesis, & Power Optimization Soft and hard IP integration Collaboration with...

Job Description: ASIC Design & RTL Skills Architecture exploration and improvements Micro-architecture development includes interface definition, state machine, data & control path definition, design partitioning. RTL development using Verilog, System Verilog Lint, CDC, Synthesis, & Power Optimization Soft and hard IP integration Collaboration with...

Computational requirements for next generation automotive camera processors are challenged by highly constrained use case environments (low power/small footprint) and competitive market dynamics. The ASIC Engineering team at our client's company architects, designs and verifies the family of camera video processors at the heart of the company. As an ASIC...

Computational requirements for next generation automotive camera processors are challenged by highly constrained use case environments (low power/small footprint) and competitive market dynamics. The ASIC Engineering team at our client's company architects, designs and verifies the family of camera video processors at the heart of the company. As an ASIC...

Job Description: ASIC Design & RTL SkillsArchitecture exploration and improvementsMicro-architecture development includes interface definition, state machine, data & control path definition, design partitioning.RTL development using Verilog, System VerilogLint, CDC, Synthesis, & Power OptimizationSoft and hard IP integrationCollaboration with verification...

Job Description: ASIC Design & RTL SkillsArchitecture exploration and improvementsMicro-architecture development includes interface definition, state machine, data & control path definition, design partitioning.RTL development using Verilog, System VerilogLint, CDC, Synthesis, & Power OptimizationSoft and hard IP integrationCollaboration with verification...

Title: SIC Design Engineer Duration: Full Time/Perm Location: San Jose, CA JOB DESCRIPTION We are looking for an ASIC design engineer with hands-on RTL design experience. Understanding of Networking is preferable. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment are...

Title: SIC Design Engineer Duration: Full Time/Perm Location: San Jose, CA JOB DESCRIPTION We are looking for an ASIC design engineer with hands-on RTL design experience. Understanding of Networking is preferable. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment...

Title: SIC Design Engineer Duration: Full Time/Perm Location: San Jose, CA JOB DESCRIPTION We are looking for an ASIC design engineer with hands-on RTL design experience. Understanding of Networking is preferable. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment...

ASIC Design EngineerRemote, USAW2 Contract 6 Months$111/hr + Benefits We are a leading provider of smart, connected, and secure embedded control solutions. Our solutions serve more than 125,000 customers across the industrial, automotive, consumer, aerospace and defense, communications, and computing markets. As a member of our engineering community, your...

ASIC Design EngineerRemote, USAW2 Contract 6 Months$111/hr + Benefits We are a leading provider of smart, connected, and secure embedded control solutions. Our solutions serve more than 125,000 customers across the industrial, automotive, consumer, aerospace and defense, communications, and computing markets. As a member of our engineering community, your...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. PREFERRED EXPERIENCE: • 10 years' experience in RTL coding • Knowledge of PCIe Gen5 and PIPE...

Description Title: ASIC Design Engineer Location: San Jose, CA Responsibilities · Control subsystem development in large mixed signal ASICs · Work with system architect to define control plane spec / micro-architecture and RTL development · Design size/timing/power optimization via micro-architecture/RTL/Synthesis · Layout support for...

Description Title: ASIC Design Engineer Location: San Jose, CA Responsibilities · Control subsystem development in large mixed signal ASICs · Work with system architect to define control plane spec / micro-architecture and RTL development · Design size/timing/power optimization via micro-architecture/RTL/Synthesis · Layout support for...

Title: SIC Design Engineer Duration: Full Time/Perm Location: San Jose, CA JOB DESCRIPTION We are looking for an ASIC design engineer with hands-on RTL design experience. Understanding of Networking is preferable. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components.PREFERRED EXPERIENCE: • 10 years' experience in RTL coding • Knowledge of PCIe Gen5 and PIPE...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components.PREFERRED EXPERIENCE: • 10 years' experience in RTL coding • Knowledge of PCIe Gen5 and PIPE...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. • Guarantee quality/timely deliverables meeting project’s schedule. • Help to improve/automate...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. • Guarantee quality/timely deliverables meeting project’s schedule. • Help to improve/automate...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. • Guarantee quality/timely deliverables meeting project’s schedule. • Help to improve/automate...