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AI Data Center High-Speed Interconnect Architect Fremont, CA
Fulltime Permanent
The High-Speed Interconnect Architect will define and engineer the architecture for advanced high-speed interconnect systems integral to next-generation AI servers and rack configurations. This entails the development of technologies such as high-speed backplanes (NVLINK, UALINK, EXAMAX 2), co-packaged copper, high-speed flyover cables, PCIe, CXL, OSFP, OSFP-X, 448G/lane technology, and sophisticated onboard connectors. The architect will ensure these solutions satisfy stringent demands for bandwidth, latency, signal integrity, scalability, and reliability within high-density AI and HPC environments. This role is crucial for the realization of next-generation scalable, high-performance AI infrastructure through advancements in interconnect technology.
Architect and optimize high-speed interconnect solutions, including backplanes, co-packaged copper, flyover cables, OSFP, OSFP-X, and onboard connectors, for AI/ML and HPC platforms. Achieve equilibrium among performance, signal integrity, power consumption, cost efficiency, and manufacturing feasibility.
Signal and Power Integrity Management: Collaborate with signal and power integrity engineers to ensure robust high-speed data transmission and adherence to electrical and EMI/EMC standards.
Engage with hardware, system, packaging, and software development teams to integrate interconnect solutions into AI server and rack architectures.
Technical Documentation and Strategic Planning: Author technical specifications, architecture documents, and contribute to the product roadmap for high-speed interconnects.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
Minimum of 10 years of professional experience in high-speed interconnect architecture, signal integrity, or system design for compute, networking, or AI platforms.
Extensive expertise in high-speed protocols (NVLINK, UALINK, EXAMAX 2, PCIe, CXL, Ethernet, InfiniBand, OSFP, OSFP-X) and advanced connector/cabling technologies.
Familiarity with hardware/software co-design and performance analysis for AI/HPC workloads is advantageous.
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