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Senior ASIC Design Engineer
4 months ago
Department Summary:
MITRE's Electronic Systems Development and Embedded Security department is seeking to hire talented and creative engineers with significant expertise in implementing complex designs targeting digital ASICs (Application Specific Integrated Circuits) to lead and support advanced research and development projects of national significance.
As part of our team, you will have the opportunity to architect and implement technical solutions for a wide range of challenges currently faced by our government sponsors. We specialize in rapid prototyping of advanced sensor, communication, and navigation systems on leading edge semiconductor process technologies. As an applied research organization, we focus on capability development and demonstration. Our world class labs provide a canvas for our team to conduct hands-on research, testing, and develop tangible solutions to support our military leaders and reinforce our nation's defense.
Roles & Responsibilities:
This position provides an exciting opportunity to design, implement, and verify digital designs on leading edge process nodes producing game-changing complex integrated circuits (ICs) in support of mission critical programs. Key opportunities include:
Working on cross-disciplinary teams of highly talented and motivated engineers on projects of national importance
Designing advanced architectures for high throughput signal processing, SoCs (Systems on Chip), radar, PNT, and secure solutions for hardware
Develop low size, weight, power and cost (SWaP-C), highly integrated circuits
Implementation of algorithms in SW/HW on embedded systems
Component development across both FPGA and ASIC technologies
Lead development, integration, and testing of custom prototypes in the lab
Basic Qualifications:
We are interested in highly motivated candidates with a wide variety of skills, insatiable curiosity, enthusiasm, and the ability and interest to dig deep on challenging technical problems. Minimum qualifications include:
Typically requires a minimum of 5 years of related experience with a Bachelor's degree; or 3 years and a Master's degree; or a PhD without experience; or equivalent combination of related education and work experience.
Degree in Electrical and/or Computer Engineering or similar field.
Must be a US citizen capable of obtaining and maintaining a DoD Secret security clearance
Candidates should have a strong foundation in programming and experience with one or more RTL languages such as VHDL, Verilog/System Verilog, and a solid background with RTL synthesis and simulation tools
Experience in Place and Route, Synthesis, Verification, Signoff, and/or packaging tools from industry leading EDA vendors such as Cadence, Synopsys, and/or Siemens
Strong foundation in digital design, semiconductor physics, and circuit analysis
Experience deploying on semiconductor process nodes Experience with industry standard best practices for design, verification, test, and deployment
Experience integrating third-party Intellectual Property (IP) into custom IC designs
Familiarity with scripting languages and build tools (TCL, Python, cmake, etc.)
Excellent oral and written communication skills
Applicants selected for this position will be subject to a government security investigation and must meet eligibility requirements for access to classified information. In addition, candidates must meet requirements to support project work onsite in our labs and classified facilities on the Bedford Campus
Preferred Qualifications:
M.S. or PhD in Electrical and/or Computer Engineering or similar field
Experience deploying on cutting-edge, semiconductor process nodes Experience developing technical requirements or implementing designs targeting low-SWaP applications
Experience in leading small technical teams and task management
Strong digital signal processing skills and experience mapping signal processing algorithms
Strong understanding of internal workings of electronic design automation (EDA) tools used for ASIC and FPGA development
Expertise in tear-down and reverse engineering techniques for embedded systems
Experience with Design for Manufacturing (DFM) tools and validation
Experience in PCB and/or package designs, including heterogeneous solutions
Experience deploying designs on FPGA or SDR platforms, from RTL, through simulation & synthesis, to lab bring-up and debugging
This requisition requires the candidate to have a minimum of the following clearance(s):
None
This requisition requires the hired candidate to have or obtain, within one year from the date of hire, the following clearance(s):
Secret
Work Location Type:
Hybrid
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