Director of Systems Validation CXL, PCIe or Ethernet

2 months ago

santa clara, United States Astera Labs Full time

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a scalable and customizable software-defined architecture.


Inspired by trusted relationships with hyper-scalers and the data center ecosystem, we are an innovation leader delivering flexible and interoperable products. Discover how we are transforming modern data-driven applications at www.asteralabs.com.


Astera Lab’s firmware and software are critical differentiators that have helped us win business at all CSPs and Hyperscalers. We seek a Director of System Validation to build our system validation organization.


Job Description

  • Understand the performance and functionality requirements our ICs must deliver to enable customers to develop Data Center systems using Astera Labs’ game-changing portfolio of connectivity products for Artificial Intelligence and Machine Learning applications.
  • Own the development of a comprehensive validation plan and drive its execution. Devise test automation of ICs and board products in a data-centric manner, design experiments to root cause unexpected behavior, and report results and specification compliance.
  • Engage with critical customers directly to understand their concerns and highlight the unique capabilities and performance of Astera Labs’ solutions.


Basic qualifications

  • Strong academic and technical background in electrical or computer engineering. At a minimum, a Bachelor’s is required, and a Master’s is preferred.
  • ≥12 years experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer/internal meetings in advance, and to work with minimal guidance and supervision.
  • Entrepreneurial, open-minded behavior, and can-do attitude. Think and act with the customer in mind


Required experience

  • ≥3 Years experience leading a team in a “lead by example” manner—planning sprints, assigning tasks based on individuals’ strengths and career aspirations, providing constructive/encouraging feedback, maintaining a “dashboard” view of project status, chipping into shore up gaps in execution as needed.
  • ≥5 Years hands-on experience with Silicon/System bring-up, validation, and debug expertise, including in customer systems.
  • Thorough knowledge of high-speed protocols like CXL, PCIe, NVMe, or Ethernet.
  • Good understanding of x86/ARM architecture UEFI/Linux boot sequence.
  • A strong background in developing bench automation techniques, especially using Python, emphasizing execution efficiency, repeatability, data analysis, and reporting.
  • Experience with lab equipment, including protocol analyzers, in-circuit debuggers, and CPU-based tool suites.


Preferred experience

  • Working knowledge of C or C++ for embedded FW and device drivers.
  • Working knowledge of SerDes architecture, including Tx/Rx equalization, adaptation, clock recovery, and SerDes link budgets. Experience with PAM4 SerDes is a huge bonus
  • Familiarity with PCIe compliance standards and the ability to follow and be involved in compliance and standard consortiums.
  • Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc., for IBIS-AMI analysis.

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