Signal Processing Engineer

2 weeks ago


san jose, United States Technical-Link N. America Full time

About the Company - We are looking for a qualified and highly motivated candidate for the development of signal processing RTL blocks and subsequent implementations. This will be a hands-on position, designing/implementing critical DSP blocks.


About the Role - Requirements


  • Responsibilities - List the main job duties and what the role will entail.
  • MS or PhD degree emphasis in ASIC and DSP design
  • Five or more years of experience in RTL design using Verilog and System Verilog
  • Experience in developing & optimizing DSP related RTL blocks and test and verification of DSP blocks
  • Previous exposure to physical layer of communication chips such as Wi-Fi, BLE, GNSS, or cellular is a plus
  • Design of state machines, data paths, arbitration, and clock domain crossing logic
  • Logic synthesis support, FPGA implementation, Timing constraints
  • Exposure to Design for Test, understanding of scan concept and writing DFT friendly RTL
  • Unified Power Format for simulation, synthesis, and electrical rule checking Equivalence checking
  • Accurate power estimation for RTL blocks
  • Committed to producing high-quality design
  • Team player and excellent interpersonal, communication and writing skills


Qualifications - Education details



Required Skills



Preferred Skills



Pay range and compensation package - Pay range or salary or compensation



Equal Opportunity Statement - Include a statement on commitment to diversity and inclusivity.



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