Senior ASIC RTL Design Engineer

Synopsys, Inc. in Sunnyvale seeks an experienced ASIC digital design engineer with RTL ownership to deliver production RTL for LPDDR PHY IP across mobile and AI applications.You will optimize timing, power and area across multiple process nodes, develop Perl automation for design generation, and collaborate with architecture, verification and physical design...

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking...

Cerebras Systems in Sunnyvale, CA is seeking a senior front-end design engineer to help design and deploy the next generation of the Cerebras Wafer Scale Engine. The role emphasizes RTL design, high performance, power efficiency, and close collaboration with cross-functional teams.You will own functional specification, micro-architecture, RTL development,...

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking...

Synopsys, Inc. in Sunnyvale seeks an experienced ASIC digital design engineer with RTL ownership to deliver production RTL for LPDDR PHY IP across mobile and AI applications. You will optimize timing, power and area across multiple process nodes, develop Perl automation for design generation, and collaborate with architecture, verification and physical...

Meta is seeking highly skilled Design Engineers to join our team in Sunnyvale, CA. You will contribute to the development of advanced technology solutions including machine learning, graphics, display, and network acceleration. You will design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon that enable the...

Apple, Inc. in Sunnyvale, CA, seeks an ASIC Design Engineering Lead for SoC IP DMA to lead a hands-on team through front-end design, microarchitecture, RTL, and debug. You will guide architecture alignment, drive automation, and manage schedules while delivering silicon-ready quality.The role emphasizes strong leadership, collaboration across architecture,...

Hewlett Packard Enterprise in Sunnyvale, California invites university students to join as interns on engineering projects. You will support senior team members, troubleshoot issues, and help maintain hardware and software systems while learning project methodologies. The role emphasizes RTL coding and scripting with Python, Java, or C++. You will...

# SOC Architect, Reality Labs SiliconSunnyvale, CA+3 locationsHardware+ 1 moreApply nowReality Labs focuses on delivering Meta's vision through creating advanced AR/AI enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the state-of-the-art forward with...