IP Design Verification Engineer

2 days ago


San Jose, United States Hireio, Inc. Full time

About the team:

This team is at the forefront of technological innovation, specializing in the design, development, and production of CPUs for our data center servers. Leveraging a team of highly skilled engineers, researchers, and experts, the unit focuses on creating high-performance, energy-efficient, and reliable chips that power a wide range of electronic devices and systems.

Responsibilities
  1. Develop UVM based test bench
  2. Develop simulation methodology for automated and re-usable environments
  3. Define and execute test plan towards coverage target
  4. Support performance verification, power-aware simulation, RTL/FW co-simulation, and GTL simulation
  5. Debugging regression failures
  6. Improve and refine verification process
Minimum Qualifications:
  1. Bachelor of Science in Computer Science, Electrical Engineering, or related fields
  2. Industry experience as Design Verification Engineer
Preferred Qualifications:
  1. In-depth knowledge of UVM, System Verilog, Makefile, Perl, Python, and C/C++
  2. In-depth knowledge of AMBA CHI-E, ACE-lite 4/5 protocols, SMMU, IO Coherency, and Scheduler
  3. Experience with chip interlinking protocols like UCIe, CXL and CCIX
  4. Autonomous, result-oriented, milestone-driven, and a thorough approach to work
  5. Proven ability to work well in a team
  6. Have skills: NVMe, SR-IOV, S-IOV, and Compression algorithm
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