Staff Power Analysis Engineer

Are you passionate about shaping the future of chip design? In the Solutions Engineering group at Arm, we offer the outstanding opportunity for an experienced Power Analysis Engineer to join our successful team in a dynamic and diverse role

Arm is establishing a team to develop best-in-class silicon platforms based on Arm’s IP Compute Subsystem solutions, addressing markets such as premium mobile, infrastructure, and automotive. Arm’s ambition is to demonstrate efficient performance by architecting, designing, implementing, and fabricating pioneering silicon test chips using the latest SoC process nodes and packaging technologies.

This is an exciting and unique initiative, where we are driving how the next generation of leading compute devices are built across the industry. Join Arm to be part of the solution

You will join a highly focused group where we analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools.

• Analyze the power efficiency of SoC design features from early estimation to final product validation.
• Developing and running RTL simulator and emulator based workloads to analyze the power of the hardware design.
• Taking pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis.
• Analysis engineers collaborate with multiple teams from SoC Architecture, Performance Analysis, Microarchitecture Design, to Physical design to develop and analyze real software use-cases and the physical hardware.
• Building relevant metrics along with visualization to demonstrate the hardware power signature and capabilities of the compute subsystems.
• Reviewing the quality and accuracy of data produced by the latest EDA power analysis tool flows.
• Continuously innovating by improving the power analysis methodologies used by the team.

We are seeking experienced engineers for a multi-disciplinary role in power analysis. Ideal candidates have past experience in power analysis or are motivated engineers with valuable transferable skills from design, implementation, or verification backgrounds.

• Skilled in performing power modeling or pre-silicon power analysis flows.
• Experience with low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention.
• Ability to understand and balance trade-offs between power, performance, and area.
• Familiar with developing RTL using Verilog, System Verilog, or VHDL.
• Knowledge of Physical Implementation flow from RTL through Synthesis, Place & Route to STA.

• A background in development based on Arm processor based SoC system designs.
• A Bachelor’s (BS), Master’s (MS/MSc), or equivalent degree in Electronics, Electrical, or Computer Engineering. Candidates with other degrees will be considered if they have relevant work experience.
• Development or analysis of CPU or Graphics benchmarks for PPA analysis.
• Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc)
• Background in running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc)
• Good understanding of the concepts and tools related to synthesis, place & route, clock tree synthesis, constraint development, timing closure. (e.g. Innovus, Tempus, etc)

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

• Partner and customer focus
• Teamwork and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

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