Senior/Staff/Senior Staff Engineer

4 weeks ago


Lincoln NE United States Renesas Electronics Corporation Full time
Job Description

We are seeking a highly skilled and experienced Synthesis and Static Timing Analysis (STA) expert to join our semiconductor team. The ideal candidate will have a strong background in digital design and a deep understanding of synthesis and STA processes. This role involves working closely with cross-functional teams to ensure the successful implementation and optimization of digital designs.

Qualifications
  • Good Understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints Generation, UPF, Timing Closure and Signoff.
  • Develop TCL scripts and design constraints to perform synthesis, DFT insertion, and static timing analysis.
  • Interface for DFT strategy and implementation.
  • Responsible for design convergence in timing and logic equivalence.
  • Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, LEC, VCLP.
  • Knowledge of scripting languages such as Perl, Python, or TCL.
  • Experience: 3-15 years
Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial.

Renesas is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law.

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