Hybrid Pre-Silicon Clock IP Verification Engineer

3 days ago

Phoenix, AZ, United States Intel Corporation Full-time $122,000 - $173,000

Intel Corporation seeks an IP Design Verification Engineer to verify clock generator IPs (PLL/FLL) across Intel's product development cycle. You will build verification environments, run tests in SystemVerilog/UVM, and debug pre-silicon issues to meet strict specifications.

You will collaborate with architects, RTL and analog teams, lead AMS validation activities, and help evolve IP verification methodologies across multiple generations.

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