Sr Principal Digital Signal Processing
2 weeks ago
* 15+ years experience in FPGA firmware development from architecture through implementation, simulation, and hardware testing or 12+ years with a relevant MS degree
* Proven experience with hardware description languages such as VHDL or Verilog
* Comprehensive understanding of digital signal processing techniques for communications and/or radar.
* Hands-on laboratory experience with instrumentation, test equipment, and debug/test methods for proving out FPGA development on hardware
* Highly motivated personality with the ability to work independently and across a collaborative team environment
Candidates must be a resident of the North Alabama area or willing to relocate to the Huntsville - North Alabama, AL area Desired Skills: Familiarity or experience with any of the following would be a plus: * Zynq UltraScale+ MPSoC / RFSoC Architecture
* Virtex UltraScale+ Architecture
* Zynq-7000 SoC Architecture
* Xilinx IP Integrator
* High speed ADCs/DACs
* RF system design
* PCB layout and design Security Requirements: Candidate must be a US Citizen and possess (and be able to maintain) a Final Top Secret/SSBI Clearance or meet the eligibility to obtain (and maintain) a Final Top Secret Clearance. Original Posting Date: 2024-05-09
While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above. Pay Range: Pay Range $144,300.00 - $260,850.00 The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.
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