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Senior Digital Design Engineer

3 months ago


San Diego, United States Northrop Grumman Full time

What You'll Get to Do:

Our Advanced Digital Engineering organization creates the next generation of communications and signal processing systems and will take ideas from concept to working systems aboard the world’s most advanced platforms. We bring design to life in our San Diego labs and have on-site advanced manufacturing just minutes from the beach Southern California is famous.


As a Digital Design Engineer at Northrop Grumman, you will have an opportunity to be a part of an organization that is collaborative, open, transparent, and team-oriented with a focus on team empowerment & shared responsibility, flexibility, continuous learning, and a culture of automation.

We’re asking: are you ready to challenge the impossible and define possible? If you have hands-on experience in FPGA Development with VHDL, apply today.


Roles and Responsibilities:

  • Responsible for research, design, and development for digital designs associated with multi-function software defined radios, as well as automated test equipment
  • Work with evaluation boards to test proposed designs
  • Support the implementation of digital FPGA hardware architecture and algorithms
  • Collaborate with Systems Engineering to ensure firmware design meets system level requirements
  • Review designs and analysis
  • May lead a team of Digital VHDL engineers


This position may be considered at a higher grade based on the requirements below.


Basic Qualifications Principal Digital Engineer:

  • Bachelor’s degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline with 5 years of digital verification engineering experience using industry standard simulation tools; 3 years with an MS degree; 0 years with PhD.
  • Must have hands on FPGA design experience with VHDL within the past 3 years
  • Experience with AMD/Xilinx 7 (Zynq, Kintex and Ultrascale) or Versal family of devices.
  • Experience with Electronic Design Automation (EDA) Tools: Vivado and QuestaSim.
  • Clearance: Candidate must have an active or current/in-scope Secret Clearance with the ability to obtain higher level clearances


Basic Qualifications Senior Principal Digital Engineer

  • Bachelor’s degree in Electrical Engineering or other STEM (Science, Technology, Engineering or Mathematics) discipline with 9 years of digital verification engineering experience using industry standard simulation tools; 7 years with an MS degree; 4 years with PhD.
  • Must have hands on FPGA design experience with VHDL within the past 3 years
  • Experience with AMD/Xilinx 7 (Zynq, Kintex and Ultrascale) or Versal family of devices.
  • Experience with Electronic Design Automation (EDA) Tools: Vivado and QuestaSim.
  • Clearance: Candidate must have an active or current/in-scope Secret Clearance with the ability to obtain higher level clearances


Preferred Qualifications Principal and Senior Principal:

  • Experience with leading and mentoring a team
  • Experience with DSP, MATLAB, and SimuLink
  • Experience with the Electronic Design Automation (EDA) Tool Quartus.
  • Knowledgeable in FPGA physical constraints and achieving timing closure.
  • Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
  • Generation of Test Benches and support of formal VHDL Verification