Engineering Manager

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned professional in Analog & Mixed-Signal Layout design with a passion for leading and mentoring teams. You thrive in dynamic environments and have a knack for problem-solving. Your technical expertise is complemented by your ability to manage projects and coordinate across global teams. You possess excellent communication skills that enable you to interact effectively with internal and external stakeholders. Your background in advanced FinFET nodes and experience with design tools like Custom Compiler and Cadence Virtuoso make you a valuable asset to our team. You are autonomous, make timely decisions, and can handle interruptions while maintaining focus on project goals. Your organizational skills and attention to detail ensure that projects are completed efficiently and to the highest quality standards. With your experience in SERDES design architectures and verification tools like ICV and Calibre, you are well-equipped to tackle challenging design problems and drive technical strategy and execution.

What You‘ll Be Doing:

• Work with cross-functional teams to enable advanced technology nodes, ensuring alignment across geographically distributed teams.
• Establish and maintain relationships with internal and external customers, fostering collaboration and communication.
• Create and maintain comprehensive methodology and workflow documentation.
• Negotiate technical details with customers, ensuring clarity and feasibility.
• Act as a technical reviewer for Statements of Work (SoWs).
• Guide execution teams and help resolve challenging design problems.
• Participate in internal technical forums and discussions to share knowledge and best practices.
• Work closely with pPDK and IC design tools teams to influence technical strategy and execution.

The Impact You Will Have:

• Drive innovation in Analog & Mixed-Signal Layout design, contributing to the development of cutting-edge technology.
• Ensure high-quality design outputs that meet or exceed customer expectations.
• Facilitate effective collaboration and communication across global teams, enhancing project efficiency.
• Enhance Synopsys‘ reputation as a leader in chip design and verification through successful project outcomes.
• Mentor and develop junior team members, fostering a culture of continuous learning and improvement.
• Influence technical strategy and execution, driving advancements in design methodology and workflow.

What You‘ll Need:

• MSEE or BSEE with a minimum of 10+ years of related experience, with 2+ years of experience in a technical leadership role.
• Familiarity with physical design of analog and mixed-signal CMOS circuits.
• Exposure and knowledge of the full design cycle from RTL to GDSII, including chip level.
• Experience with advanced FinFET nodes, TSMC 16 nanometer and below.
• Experience with design tools like Custom Compiler, Cadence Virtuoso, and verification tools like ICV and Calibre.
• Strong working knowledge of MS Office Suite of applications.

Who You Are:

• Excellent communication skills, capable of interacting at different levels of abstraction with peer groups and customers.
• Solid organizational skills, with a keen attention to detail and ability to multitask.
• Autonomous and timely decision-maker, able to handle interruptions effectively.
• Creative problem-solver, capable of resolving complex issues and encouraging innovative solutions.
• Experienced in mentoring and training junior peers, fostering their growth and development.

The Team You‘ll Be a Part Of:

You will be part of a dynamic and collaborative team focused on Analog & Mixed-Signal Layout design. Our team is dedicated to driving innovation and excellence in chip design, working closely with cross-functional teams and customers to deliver high-quality solutions. We value open communication, continuous learning, and a commitment to achieving our goals together.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.