Physical Design Implementation Flow Development Engineer

1 month ago


Phoenix, United States Mastech Digital Full time

Physical Design Implementation Flow Development Engineer

Job Description

  • Develop flow and methodology for physical design implementation in advanced
  • technology nodes, including 3nm.
  • Responsibilities include physical design implementation methodology development for
  • multi-hierarchy low-power designs including physical-aware logic synthesis, design for
  • testability, floorplan, place & route, clock tree synthesis, routing, static timing analysis,
  • IR Drop, EM, and physical verification.
  • Support & resolve design and flow issues related to physical design implementation, identify potential solutions, and drive & implement methodology improvements.

Qualifications & Requirements

Basic Qualifications:

  • Bachelor's degree in Electrical Engineering or Computer Science.
  • 5-9 years’ experience in ASIC design flow usage & development.
  • RTL2GDS experience on advanced technology nodes (7nm and below).
  • Experience with low power implementation and signoff, power gating, multiple voltage
  • rails, UPF knowledge.
  • Experience with multi-clock and multi-power domain designs.
  • Proficiency with ECO implementation for timing, functional and DFT modes.
  • Experience in Block-level and Full-chip floor-planning and power grid planning.
  • Experience in Block-level and Full-chip design implementation.
  • Strong expertise in Python & TCL programming.
  • In-depth experience working with EDA tools like Fusion Compiler, ICC2/Innovus, Primetime, Calibre.


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