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Senior ASIC Digital Design Engineer
2 months ago
COMPANY INFORMATION
Stathera is a semiconductor company focused on delivering performance leading MEMS timing and frequency reference solutions for the semiconductor industry.
Headquartered in Montreal, and with offices in Toronto and Boston, our team specializes in MEMS timing products which provides disruptive competitive advantages over quartz-based timing. At Stathera, we are also passionate about saving time, and reducing system costs for our customers. Our first-to-the-world true dual-output (kHz and MHz) MEMS oscillator replaces two quartz-based oscillators, enabling simplification of system design, miniaturization, BOM reduction, lower current consumption, and lower cost for a variety of applications including wearables, IoT and smartphones.
Stathera is transforming the 100-year-old quartz-based timing market to MEMS-based timing with our breakthrough innovation in Timing technology and was the only Canadian company to make it to EE Times Silicon 60: 2018’s Emerging Companies to Watch.
INTRODUCTION TO ROLE
Stathera is looking for an Senior ASIC Digital Design Engineer to join our team. We encourage candidates with a strong background in digital design to apply to this position.
The successful candidate will earn valuable experience in a fast moving, collaborative, and high performing Startup environment.
The Senior ASIC Digital Design Engineer will report directly to the Director of ASIC Engineering and will be expected to work a total of 40 hours per week.
The candidate can be based in Toronto, Montreal or Boston.
RESPONSIBILITIES AND DUTIES
- Develop and implement digital circuits for ASIC projects, ensuring functionality and adherence to design specifications.
- Perform synthesis and optimization to meet performance, area, and power targets.
- Coordinate with cross-functional teams for seamless integration of digital designs into larger systems.
- Prepare comprehensive design documentation, including specifications, test plans, and implementation details.
REQUIRED SKILLS
- BSEE or MSEE with minimum of 5 years experience in digital design.
- Familiar with Verilog and Xcelium. Good knowledge of back-end synthesis tools Genus/Innn Shell, Perl, Python and TCL is a plus.
- Experience in defining synthesis constraints and STA.
- Scripting experience, and ability to apply good design quality while meeting tight deadlines
- Ability to produce clear and comprehensive design documentation.
DESIRED SKILLS
- Understanding of digital logic and verification flow.
- Experience in synthesis and achieving timing closure.
- Problem-solving and analytical skills.
- Works well under pressure and has great time management skills.
BENEFITS
At Stathera, we value the well-being and success of our exceptional employees. That's why we proudly offer a comprehensive Group Benefits Plan that includes medical, dental, and vision coverage.
In line with our commitment to fostering a collaborative and inclusive work environment, we provide the opportunity to our employees to share in our success through our Employee Stock Ownership Plan.
If you are looking to start your career with a supportive team, gain valuable work experience, please send us your resume, we would love to hear from you
Stathera is an Equal Opportunity and Affirmative Action employer. We are committed to creating a work environment based on mutual respect, hard work and inclusion without bias or discrimination. Our team is made up of people from all backgrounds and walks of life, and each member is valued for what they know and what they can contribute. As a collective we are continuously learning and encourage each other to push our boundaries and make mistakes we can all learn from. Those who do so will get an opportunity to grow with us and share in our success.
