DFT (SOC or CPU) Lead

1 month ago


Santa Clara, United States Fierceli Inc Full time

This is a lead role - Senior with 10+ yrs of relevant experience

Requirements

  • Good knowledge of digital logic design, microprocessor, debug feature, DFT architecture, CPU architecture, and microarchitecture
  • Knowledge of DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump
  • Knowledge of Verilog and experience with simulators and waveform debugging tools
  • Knowledge of Verilog / SystemVerilog
  • Knowledge of Python, , Shell scripting, Makefiles, TCL a plus
  • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
  • Ability to work well in a team and be productive under aggressive schedules.


DFT/scan/JTAG/iJTAG/MBist/SSN(stream network)/SMS


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