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Sr. ASIC/FPGA Design Verification Engineer
2 months ago
Role: Sr. ASIC/FPGA Design Verification Engineer (W2)
Duration: Contract
Location: El Segundo, CA (Onsite)
Description:
5 years of ASIC/FPGA Design Verification Engineer experience
Bachelor’s Degree in Engineering
Must have a minimum of 5 years of experience, UVM experience is important and required.
• Utilize understanding of system requirements to architect block-level design specifications
• Prepare detailed design documentation
• VHDL coding, logical equivalency checking, static timing analysis, CDC, linting
• Integration of third-party IP
• Target designs to AMD/Xilinx Devices using Vivado synthesis and Place Route
Basic Qualifications (Required Skills/Experience):
• Ability to capture and review FPGA design requirements
• Develop and document design Micro-architecture
• Develop design code in VHDL
• Experience targeting AMD/Xilinx family of FPGA devices
• DO-254 experience is a plus
