Hardware Design Engineer
1 month ago
Job title:- Hardware Engineer Mid
Location:- Mountain View, CA 94043
Duration:- 12 months
Job description
- Experience range - 10-20 years
- NOTE: This is similar to Design verification role and should have experience in System Verilog HVL, C++, Processor verification, UVM, SOC verification on FPGA, complete verification cycle, Make/Perl/Python, Test bench
What You'll Be Doing:
- At-least 10+ years of experience in System Verilog HVL and C++.
- At-least 10+ year of experience in SV/UVM.
- Strong PCIe expertise is must
- Porting/Testing in FPGA & Emulation (Zebu) Hardware realization Platform is good to have
- Make/Perl/Python
- Proactive Communication is mandatory.
What We Are Looking For:
- Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure.
- Verification closure with team
- Ensure customer satisfaction.
- Reporting to customer on daily or weekly progress effectively
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