Technical IP Project Manager

1 week ago

Santa Clara, California, United States Marvell Full time

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Technical IP project manager will be part of Central Engineering's Analog Mixed-Signal IP development team responsible for IP development management and SOC-IP integration support to ensure the success of IP integration in both frontend and backend to the SOC before tape out.

What You Can Expect

The successful candidate would have good understanding of all IP development stages and the usage of related analog IPs to be integrated to SOC. Good understanding of technologies and IP development process and methodology are required. Excellent interpersonal skills and communication skills are a must. The responsibilities include but are not limited to:

  1. Track and report IP development progress
  2. Understand and improve design and change list review/sign-off flow
  3. Provide basic IP integration support to SOC including IP selection and IP floorplanning with reference clock/analog signals distribution review
  4. Conduct IPs' analog signals and P/G physical routing review
  5. Work closely with IP developer and technical writer to ensure information in the IP integration and physical routing guides for SOC use are accurate and up-to-date
  6. Drive closure SOC supporting request related to Pre-silicon SOC-IP integration
  7. Support IP Program Management team to resolve IP integration issues on SoC level

What We're Looking For

  • BS in Electrical Engineering and MSEE preferred
  • 15+ years of experience as a mixed-signal IP designer
  • 5+ years of experience as an Engineering Project Manager in the Semiconductor industry preferred
  • Knowledge of SoC/IC design flow for advanced process technologies and process flows and methodologies in Silicon Development
  • Excellent verbal and written communication and presentation skills
  • Demonstrated effective working relationships with key stakeholders
  • Able to work effectively with global team and be self-motivated to solve problems and manage deliverables.
  • Excellent leadership skills
LI-TD1

Expected Base Pay Range (USD)

168, ,000, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

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