Staff Engineer, Analog Design

1 month ago


San Jose, United States Samsung Semiconductor Full time
  • Samsung Interface Lab (SIL) is looking for a senior analog design engineer with experience in high-speed I/O design.
  • SIL is an R&D division of Samsung's System LSI Division, in charge of high-speed interface development for various SLSI divisions including Display, Camera, and SoC. This is a newly established and growing team within the Samsung San Jose office, in charge of taking a design from concept to production across a wide range of products.
  • Location: Hybrid, working onsite at our San Jose office, 3 days per week, with the flexibility to work remotely the remainder of your time
  • Architecture and design of high-speed I/O circuit blocks such as TX, PLL, CDR, Analog Front-End (AFE/CTLE), DFE.
  • Bachelors with 10+ years of relevant industry experience, or Masters with 8+ years or PhD with 5+ years in Electrical Engineering, Computer Science or related field preferred.
  • Solid background in mixed-signal circuit design, and in particular past experience with PLL, DLL, CDR, DFE, TX, or analog front-end (AFE/CTLE).
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.


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