Principal FPGA Design Engineer

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Thanks for your interest in working on our team

Principal Tasks

• Demonstrated ability to perform research and/or drive new technologies internally and represent this work externally within the industry
• Demonstrated ability to work at the architecture level in any area of the system or as a company level expert in several significant technology domains
• Considered a department, possibly company expert in multiple technical areas, and frequently consulted by other parts of the company for this expertise
• Provided consulting across the company for a significant technology domain to a number of different projects
• Recognized as an industry expert for a significant technology domain both internally and externally
• Provides technical leadership to a team of engineers to develop a portion of the system
• Participated in a least ten full Telecom/Datacom product design life cycles working in a variety of system areas or as an industry level expert in a significant technology domain in a number of different projects
• Capable of representing the company in a leadership role in industry forums such as standards committees, technical customer meetings, etc.
• Operating at the equivalent of an engineer with 17 plus years of relevant experience
• Reports to the Sr Director of ASIC/FPGA/IP Development.
• Provides technical expertise to ASIC/FPGA/IP development department of ADVA Optical Networking, Inc
• Mentors and provides leadership for Senior and Junior staff in technical issues to help them understand the architecture, design, processes, tools, etc.
• Technical responsibilities may include any of the following: provide resource estimates, develop device architectures, RTL coding, behavioral descriptions and modeling, test case and/or test bench development, logic synthesis, test vector generation, functional test coverage, formal analysis, thermal analysis, SSO, AC timing, DC characteristics, pinout, packaging, etc.
• Adheres to department procedures regarding computer file structure, design file management, device specifications, coding guidelines, and synthesis guidelines and file security
• Typically provides a Chip Design/Tool Driving Role.
• Follows and drives improvements to the Design & Verification Methodology
• Participated in a least seven full telecom/datacom product design life cycles working in multiple system areas.
• Capable of representing the Engineering department within company forums such as process discussions, customer support, etc
• Operating at the equivalent of an engineer with 15 plus years of relevant experience.
• Able to design new or make improvements to verification test benches and test cases help make detailed verification plans
• Collaborative and good communications skills
• Excellent debugging and problem solving skills
• Capable of working independently on the assigned design activities with minimal supervision
• Work effectively with internal designers and external contractors
• Quickly identify verification holes using tools and methods
• Self-starting, Highly Self Motivating

Supplementary Tasks:
• IP implementation & validation
• Scripting related to Perforce/Collabnet (Subversion)
• Provide assistance with new hire candidate interviews and hiring decisions
• Supporting existing products that are released in to production
• Assist in team building at other sites, Limited Travel, other duties as required
Customers (Internal & External)

Internal
• Global FPGA/IP Development Manager
• Product Line Management, Systems Architecture, HW, SW, SIT Managers
• Relevant Project Manager
• HW/FW/SW Team Personnel

External
• Professional interaction with EDA Companies, FPGA Companies, and other semiconductor, and electronic equipment suppliers, vendors, distributors and their representatives.
• Customer Support or others as required or needed

Skills / Qualifications / Training / Experience:

• Preferred Degree Qualification: BS or MS degree in Electrical Engineering
• Preferred Years of Electrical Engineering experience: BS+15 years, MS+12 years
• No Agencies, legally authorized to work in the US
• Multiple previous experience with Large FPGA, ASIC, or ASSP designs
• Multiple previous experience verifying complex Application Specific Integrated Circuits/Field Programmable Gate Arrays (ASICs / FPGAs) using C/C++ ior System Verilog.
• Experience with building and setting up scalable simulation / verification environments ideally with OVM/UVM.
• Communicates and executes project requirement and technical strategy
• Ensures ADVA "ASIC/FPGA" Hybrid Methodology, and project specific design requirements will be met on schedule, and recommends improvements
• Channels technical expertise toward project goals consistently on complex projects of key value to the company
• Conducts critical design reviews at the IP or Chip level
• Technical/SOC Lead, some design, and a design resource to the SOC team
• Early Stage role in Chip Architecture in collaboration with System Architects and Product Line Marketing/Management and Global FPGA/IP Development manager
• Expert in multiple technical areas in ADVA products: OTN, Ethernet, Sonet/SDH, FEC, DSP industry standards
• Knowledge of PLLs, Clock & Reset and Hierarchical Architectures.
• Knowledge of IEEE/ITU-T/MEF/EFM Networking industry Standards
• Self-Starter, Highly Self Motivated Leader
• Able to maintain FPGA/IP Development goals without sacrifice while working with project managers on specific project goals
• Proactive, responsive and keen on process enhancement including those with interactions with other departments.
• Ability to deal with shifting priorities, changing requirements and demonstrates superior multi -tasking capability in a fast moving environment
• Expert in Languages, Verilog, VHDL, and proficient in Perl, C, Python & System Verilog (incl. OVM/UVM/SVA)
• Deep knowledge of physical implementation methods and requirements of high speed electronic systems
• Adequate knowledge of OS: Linux/CentOS based environment
• Tools: Expert with Synplify Pro, Quartus/Nios, Vivado, ISE/EDK, Synopsys VCS or Mentor Questasim
• Willingly assist in team building locally and at other sites

PHYSICAL DEMANDS AND WORKING ENVIRONMENT
• Ability to remain stationary for long periods of time;
• Able to work at a desk majority of the day
• Moderate lifting, 15-44 lbs
• Ability to use a computer keyboard and computer screen for extensive computer work (preparing documents spreadsheets and communications via electronic mail)
• Ability to regularly work a minimum of 40 hours per week

Success Criteria:
• Successful and timely completion of project milestones
• Can do attitude. Seriously Hard worker.
• High energy individual, Internally motivated
• Able to work well within development organization
• Ability to multitask in a dynamic environment that includes working with changing needs and requirements
• Ability to work as a team and develop leadership abilities
• Desire to help others with technical issues
• Methodology - ASIC Design/Verification Flow
• Can do attitude.

Senior
• Project management skills
• Demonstrates a wide degree of creativity and latitude
• Broader scope to interact at development and industry standards level

Principal
• Relies on extensive experience and judgment to plan and accomplish goals
• Demonstrates a wide degree of creativity and latitude of knowledge