ASIC Staff Design Engineer

3 weeks ago

Menlo Park CA, United States Cerncourier Full time

SLAC National Accelerator Laboratory seeks an Application Specific Integrated Circuit (ASIC) design engineer within the Integrated Circuits Department of the Instrumentation Division of the Technology Innovation Directorate. The IC department develops state-of-the-art, low-noise and low-power front-end Application Specific Integrated Circuits (ASICs) to support experiments in several fields of science, such as: ultra-fast X-ray photon science, high energy physics, quantum information science, medical imaging, biomedicine, space applications, and others. Several projects are carried out in collaboration with major research facilities in the world (CERN, NASA, LCLS) and other US government agencies and universities. Moreover, the IC department develops innovative IP solutions in collaboration with industrial partners.

The department is seeking to strengthen its capabilities in analog/mixed signal design to implement the next generation system-on-chip (SoC) ASICs. As mixed signal designer you will be exposed to advanced CMOS technologies such as 65nm, 28nm, and 22nm FDSOI, designing novel circuit techniques for extreme conditions (cryogenic temperatures, high radiation levels, ultra-low power) and emerging applications.

Members of our team are encouraged to work in a variety of areas, supporting multiple diverse designs in a dynamic, energetic environment which values work life balance and comes with all of the benefits of being an employee of Stanford University.

The work will include science, engineering concept development and hands-on work with detectors systems. SLAC has broad engineering and technical support, but there will be a need for a wide range of work ranging from concept development to laboratory performance testing, to electronics and software development, to on-site commissioning. This position requires exceptional adaptability in doing whatever is needed to ensure the successful realization of projects. This work involves solving problems no one has ever solved before. There will be lots of opportunities for technical discussions, but ultimately the individual in this role will have responsibility for finding the solutions.

Given the nature of this position, SLAC is open to on-site and hybrid work options.

Your Specific Responsibilities Include

As an ASIC designer, you will be involved in the design and integration of advanced and complex ASICs through the following assignments:

• Define key specifications of analog and digital circuitry.

• Behavioral modeling to validate system architectures.

• Design of ultra-low-noise, low-power analog front-end electronics.

• Design of low-power and area efficient data converters with medium-high resolutions.

• Circuit design techniques for signal conditioning, reliability, and testability.

• On-chip supply regulation techniques through the design of low-noise and low-power LDOs

• Design of high precision reference voltage and current circuits, including biasing techniques

• Design optimization for cryogenic operation and radiation hardening.

• Floor planning, layout design and physical verification of active circuits.

• Top-level simulations to validate ASIC integration.

• Document design towards formal design reviews.

• Coordination of PCB design for chip characterization.

• Hands-on in lab for chip characterization and testing plans for validation.

Cross-functional Responsibilities

• Engage and collaborate with SLAC cross-functional teams, including scientists and electronics engineers developing FPGAs, PCB, DAQ systems, semiconductor, and quantum sensor devices.

• Engage and collaborate with other national labs, research institutions and high-tech companies.

To Be Successful In This Position You Will Bring

• Master’s degree in the field of electronics engineering or related research fields.

• Proficient with IC design flow and CAD tools for schematic entry, simulation, and layout design, including physical verification and top-level integration.

• Solid knowledge of programming and/or scripting languages: Python, TCL, etc.

• Solid knowledge of one or more HDL languages: Verilog, VHDL, SystemVerilog.

• Working e xperience with verification techniques of mixed-signal circuits.

• Strong knowledge on low-noise and low-power design techniques

• Background in designing one or more of the following categories: low-noise and low-power amplifiers, biasing circuits, data converters, timing converters, PLLs and LDOs.

• Deep knowledge of behavioral modeling of circuit blocks (Verilog-A, SystemVerilog RNM).

• Demonstrated knowledge with version control for both analog and digital circuits.

• Excellent writing skills to keep track of design documentation.

• Strong team player and ability to adapt and work well in a research and development team

• Ability to work with minimal supervision and carry out responsibilities proactively

• Excellent analytical thinking skills

• Strong communications skills

Contact:Lorenzo( lorenzor@slac.stanford.edu )

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