Senior communications architect local
4 weeks ago
Arm’s Solutions group DFT team implements DFT for SOC for client, datacenter, automotive, and IOT line of business using the latest DFT and process technologies. We closely collaborate with Arm’s partners and internal RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE
Work closely with multi-functional teams to support DFT RTL level insertion, synthesis and scan insertion, place-and-route, and static-timing-analysis and timing closure.
This role is for a Senior Principal DFT Architect with 16+ years of proven experience in Design for Test
~10+ years of experience handing DFT architecture for complex SOCs in leading technology nodes.
~ Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, DFT mode timing constraints, back-annotated gate level verification, silicon debug, memory and scan diagnostics.
~ 5D and 3D test
~ Experience coding Verilog RTL, TCL and/or Perl.
“Familiarity with SoC style architectures including multi-clock domain and low power design practices.
Background in design, implementation and timing convergence is a plus
Teamwork and communication
Creativity and innovation
Team and personal development
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