Senior SOC Timing Engineer

5 days ago


Sunnyvale, California, United States Apple Full time

We are seeking a highly skilled Senior SOC Timing Engineer to join our team at Apple. In this role, you will be responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC using state-of-the-art process technology.

Job Summary
  • This is a senior-level position that requires a deep understanding of timing paths and STA methodologies.
  • You will work closely with design teams to understand and debug constraints and facilitate logic changes to improve timing.
About Apple

At Apple, we pride ourselves on delivering innovative products and services that exceed customer expectations. Our team members share a passion for innovation, collaboration, and continuous learning.

Key Responsibilities
  • Implement timing infrastructure and create timing ECO's for project tapeout.
  • Create and maintain scripts and methodologies for analysis and runs.
  • Develop documentation and guidelines/specs for design teams.
  • Analyze timing paths to identify key issues and provide recommendations for improvement.
Requirements
  • Bachelor's degree in Electrical Engineering or related field.
  • Minimum 3+ years of experience in STA and timing closure for large high-performance SoC designs.
  • Familiarity with important aspects of timing and noise effects.
  • Proficient in programming languages such as Perl and TCL.
What We Offer

We offer a competitive salary range of $143,100 - $264,200 depending on skills and qualifications. Additionally, you will receive comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and free services.



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