Digital Timing Solutions Architect

5 days ago


San Jose, California, United States Cisco Systems, Inc. Full time
About the Role

Cisco Systems, Inc. is a leading technology company that delivers innovative solutions for the global digital economy.

Estimated Salary Range:

$115,000 - $155,000 per year.

Job Description

We are seeking an experienced Digital Timing Solutions Architect to join our team in this exciting opportunity.

Key Responsibilities:
  • Design and implement timing closure strategies for complex ASICs
  • Collaborate with cross-functional teams to refine chip architecture and guide physical design closure
  • Develop methodologies and guidelines to streamline STA work and resolve design and flow issues
Requirements

To succeed in this role, you will need:

  • Bachelor's degree in Electrical or Computer Engineering (or equivalent field) with 5+ years of relevant experience
  • Prior experience using Synopsys DC/DCG/FC and Synopsys Primetime/Cadence Tempus
  • Proficient in synthesis constraints and scripting languages such as TCL, Perl, or Python
Preferred Qualifications

A master's degree in Electrical or Computer Engineering (or equivalent field) with 2+ years of relevant experience would be advantageous. Experience with Synopsys PTPX/Tweaker/PrimeClosure and Formal Verification: Synopsys Formality and Cadence LEC would also be beneficial.

About Cisco

Cisco Systems, Inc. is a leader in networking hardware and software solutions. We power the internet and enable connections across the globe. Our commitment to diversity, equity, and inclusion drives us to create a workplace where everyone can thrive.



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