Senior Verification Engineer for Advanced Perception Applications
7 days ago
About Aeva, Inc.
Aeva, Inc. is revolutionizing the field of perception technology with its groundbreaking sensing and perception solutions. Our mission is to bring the next wave of autonomy to various applications, including automated driving, industrial robotics, consumer electronics, consumer health, security, and beyond.
Role Overview:
We are seeking a highly skilled Senior Verification Engineer to join our SOC Verification team. As a senior member of the team, you will be responsible for verifying new breeds of System-on-Chip (SoC) for advanced perception applications utilizing 4-D LiDAR. Your primary focus will be on architecting and developing verification environments and verifying complex SoC designs using state-of-the-art verification techniques.
Key Responsibilities:
- Lead and drive block, subsystems, and full-chip verification of advanced ARM-based SOCs.
- Design and implement test benches, reference models, and scoreboards using SystemVerilog and UVM-constrained random methodologies.
- Develop and execute test plans for block, subsystem, and full-chip using SV/UVM and C/C++ firmware running on the on-chip ARM processors.
- Collaborate with cross-functional teams, including architects, design leads, and system software teams, to define system-level verification plans and prove that the SOC meets functional, performance, and power targets.
- Analyze code, functional, and test plan coverages to identify verification gaps and achieve 100% coverage closure.
Requirements:
- 10+ years of experience in designing, verifying, and validating advanced ARM-based SOCs.
- 5+ years of experience in architecting and building constrained random verification environments, reference models, scoreboards, and directed self-checking tests using SystemVerilog and UVM methodologies.
- Deep understanding of ARM-based SOC verification, including writing assembly and C/C++ diagnostic firmware for embedded ARM processors and debugging in simulation environments.
- Working experience and knowledge in AMBA protocols, CoreSight Debugger, LPDDR, Ethernet, MIPI, high-speed serdes, etc.
- Solid programming skills in SystemVerilog, UVM, C/C++, assembly, Perl/Python.
- Proficient in debugging complex SOC or CPU core designs.
- Ability to collaborate deeply with cross-functional leads and management teams.
What's in it for you?
- $154,900 - $209,600 per year
- Very competitive compensation package, including meaningful stock grants and exceptional benefits: medical, dental, vision, and more.
- Unlimited PTO: We care about results, not punching time cards.
- Be part of a fast-paced and dynamic team at Aeva, Inc.
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