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ASIC Design Verification Lead

3 months ago

Austin, United States Chelsea Search Group Full time

ASIC Design Verification Lead

Remote/work from any US location

Full-time/Direct-hire + Benefits

US Citizen or US Permanent Resident only

Essential Duties and Qualifications :

• Reviewing and editing target specifications as required for completeness and feasibility.

• Developing architectures and specifications for complex design blocks and SOCs

• Implementing complex digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog)

• Complex computational architectures and algorithms, such as multi-rate/DSP and µP design

• Modern verification methods, incl. directed/constrained-random stimuli, assertions, TLM and UVM

• Collaborative creation of comprehensive verification plans and coverage metrics

• Multi-supply-domain and UPF methods

• Constraining and synthesizing digital designs to target cell libraries.

• Static timing, power, and SI analyses of complex digital designs

• Supporting place & route efforts, incl. P/G and floorplanning, timing and physical constraints, gated CTS, MCMM setups, back-annotation, timing closure, equivalence checking

• Planning, implementing, and analyzing designs for DFT, test hooks, and scan/ATPG/JTAG/BIST, and supporting production test with ATE patterns (ATPG and functional) and timeset definitions.

• Proficiency with Synopsys EDA, incl. DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAX

• Proficiency with Mentor EDA, incl. Questa, ADMS, Tessent

• Modern revision-control tools and best-practices in a collaborative, multi-site design community

• Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g. sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.

• Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion

Requirements :

• 7+ years of direct industry experience with ASIC and/or SoC design

• BSEE/MSEE or equivalent

• Strong background in RTL based digital IC design using Verilog/SystemVerilog

• Proven track record of first-pass successes

• Self-starter with the ability to assume leadership roles.

• Ability to work well in a diverse team environment.

• Willingness to mentor engineers.

• Experience with industry standard development tools and methodologies.

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