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Palm Bay, United States L3Harris Technologies Full time

Job Title: Sr Specialist, Advanced Electronics Packaging Development Engineer Job Code: 9331 Job Location: Palm Bay, FL Job Description: The L3Harris Microelectronics organization is growing our advanced packaging research and development efforts and capabilities. This role will allow you to pursue and then lead new business opportunities in Microelectronics related to advanced packaging including 2.5D and 3D Integration, high density build up, photonic integrated circuits, thermal management, and failure analysis. Your primary responsibilities will require basic understanding of government business acquisition models and deep understanding of challenges associated with low SWAP architecture and miniaturized electronic systems. The role will place you within a multidisciplinary team of scientists and engineers to deliver vital contributions to mission critical microelectronics solutions that help protect the U.S.A and our allies. Essential Functions: Work with Chief Engineers and subject matter experts (SMEs) to support opportunity development, shaping, pursuit, capture, winning, and then executions of advanced packaging and microelectronics business. Develop proposals, statements of work, project plans, resource estimates, and material needs. Promote emergent state-of-the-art practices Lead new programs and projects in Microelectronics. Ability to document, communicate, and present technical topics/recommendations/issues/concerns to internal and external customers. Qualifications: Bachelor’s Degree in Electrical, Mechanical, Materials Science Engineering, Physics, or related field and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related professional experience. Ability to obtain US government Security Clearance Experience with advanced microelectronic packaging including: 3D die stacking and associated thermal, mechanical, and assembly issues Through Silicon Vias (TSVs) MEMS and wafer bonding Failure analysis of 3D die stacks Preferred Additional Skills: Active security clearance Silicon-level design and experience with design tools such as Tanner L-Edit, Cadence APD and Virtuoso Experience with government programs and acquisition