Etched | Design Verification Engineer | cupertino, ca

6 days ago


cupertino, United States Etched Full time

Client: Etched

Location: Cupertino CA (Onsite 5 days a week - need local candidates)

Duration: 3 Month Contract plus Extensions to conversion

Rate: Can pay asking rate with qualified experience

Start Date: Immediately

Interviews: 1 and done 30 minute interview onsite


You may be a good fit if you

• Have a deep knowledge of SystemVerilog/Verilog and UVM

• Master's degree or foreign equivalent degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field and 5+ years of work experience as Hardware Engineer II, Hardware Engineer III, Silicon Engineer III, Sr. Silicon Engineer, ASIC Design Verification Engineer, Staff Design Verification Engineer, Principal Design Verification Engineer, or a related occupation required.

• Have an understanding of RTL design and microarchitecture



Preferred qualifications:

• Experience with chip-to-chip interconnects and HBM3/HBM3E technologies.

• Familiarity with transformer models and machine learning.

• Familiarity with numerical representations and functions.

• Ability to program with Python or another scripting language.

• Familiarity with open-source verification tools like Verilat



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