SR. FPGA Design Engineer w/Active Clearance

3 days ago


San Diego CA United States CV Library Full time

Title: FPGA Design Engineer

Location: San Diego (Onsite)

Term: Contract

Duration: Long Term

Start: ASAP

Required: Active Clearance

Requirements
  1. 10+ years experience as an FPGA Design Engineer
  2. Strong VHDL Skills
  3. Deep experience with Bring-Up
  4. Experience in Cryptography
  5. Good experience with Packet handling and External digital interfaces
  6. Experience with Microchip FPGAs is a Plus
  7. Active Government Clearance Required
  8. Onsite Full-Time Required
Benefits

A2e Does NOT Accept Unsolicited Resumes or Referrals from any source other than the candidate, and, as a result, we will not be considering any unsolicited referrals or resumes sent to us as a -based candidate submittal.

Any unsolicited resumes sent to A2e, including unsolicited resumes sent to a A2e mailing address, fax machine or email address, directly to A2e employees, or to A2e’s resume database will be considered A2e property.

A2e will NOT pay a for any placement resulting from the receipt of an unsolicited resume.

Agencies are hereby specifically directed NOT to contact A2e employees, A2e’s recruiting team, or other authorized A2e personnel, in an attempt to present candidates.

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